1. Field of the Invention
The invention relates in general to an organic light emitting display, and more particularly to an organic light emitting display and a display unit thereof.
2. Description of the Related Art
FIG. 1 is a circuit diagram showing a conventional organic light emitting display unit. Referring to FIG. 1, the organic light emitting display unit 100 includes a NMOS transistor T1, a PMOS transistor T2, a capacitor C1 and an OLED (Organic Light Emitting Diode) O1. The NMOS transistor T1 has a drain for receiving a data signal Data and a gate for receiving a scan signal Scan. The capacitor C1 has a first end coupled to a source of the NMOS transistor T1, and a second end for receiving a main voltage Vdd. The PMOS transistor T2 has a source coupled to the second end of the capacitor C1, a gate coupled to the first end of the capacitor C1, and a drain coupled to a positive end of the OLED O1. A negative end of the OLED O1 is biased at a low main voltage Vss.
The luminance of the light emitted from the organic light emitting display unit 100 is mainly determined by the driving current I flowing through the OLED O1. The driving current I is generated by the PMOS transistor T2, and the driving current I corresponds to the difference Vgs between the gate voltage and the source voltage of the PMOS transistor T2. The source voltage of the PMOS transistor T2 is the main voltage Vdd, and the gate voltage of the PMOS transistor T2 is the data signal Data when the NMOS transistor T1 is turned on.
FIG. 2 is a schematic illustration showing a conventional organic light emitting display. Referring to FIG. 2, the organic light emitting display 200 includes display units 100(1,1) to 100(m,n), scan lines SL(1) to SL(m), data lines DL(1) to DL(n), and main voltage lines VL(1) to VL(n). The scan lines SL(1) to SL(m) are for respectively transmitting scan signals Scan(1) to Scan(m) to the gates of the NMOS transistors T1 in the corresponding display units 100. The data lines DL(1) to DL(n) are for respectively transmitting data signals Data(1) to Data(n) to the drains of the NMOS transistors T1 in the corresponding display units 100. The main voltage lines VL(1) to VL(n) are for outputting the main voltage Vdd to the second end of the capacitor C1 in the display unit 100. The main voltage Vdd is substantially constant. In practice, however, the impedances of the main voltage lines VL(1) to VL(n) cause voltage drops to the main voltage Vdd. Taking the A and B points in FIG. 2 as an example, A and B points are supplied with substantially the same main voltage Vdd by the main voltage line VL(2). However, because of the current and the impedance the main voltage line VL(2), the main voltage Vdd at B point is lower than the main voltage Vdd at A point due to the voltage drop. That is, the display units 100 at different positions actually receive the main voltages Vdd with different levels. Thus, the uneven luminance of the display unit 100 and the difference from the expected luminance are caused.
In addition, the voltage drop of the main voltage line further causes another problem, the loading effect. FIG. 3 is a schematic illustration showing a conventional organic light emitting display, which displays a full white frame and a frame with an upper half of a black section and a lower half of a white section. The organic light emitting display 200(1) is for displaying a full white frame in a white region D. The organic light emitting display 200(2) is for displaying a frame with an upper half of block section and a lower half of a white section in a black region E and a white region F, respectively. It is assumed that the required current on the main voltage line VL has to be I when the conventional organic light emitting display 200(1) displays the white region D. The required current on the main voltage line VL only has to be 0.5 I when the conventional organic light emitting display 200(2) displays the black region E and the white region F because only the voltage for the display unit of the white region F has to be provided. Ideally, the luminance of the white region D should be the same as that of the white region F. However, because the required current for the white region D is larger, the caused voltage drop of the main voltage Vdd is larger and the luminance of the white region D is inversely smaller. Oppositely, the white region F requires a smaller current and the voltage drop of the main voltage Vdd of the white region F is smaller such that the luminance of the white region F is closer to the ideal state and greater than that of the white region D. The loading effect disables the frame, which is displayed by the organic light emitting display, from reaching the predetermined luminance, but rather makes the luminance of the white region F in the frame, which has the upper half of a black section and the lower half of white section, greater than that of the white region D of the full white frame such that the display effect is not ideal.
When the organic light emitting display is applied to different electrical products, which may provide different main voltages Vdd, an extra regulation circuit is needed, or an external circuit has to be added to regulate the voltage in order to achieve the required pixel luminance. This approach, however, is uneconomic and the cost thereof is high.